diff --git a/patch/kernel/archive/rockchip64-6.18/dt/rk3588-nanopc-t6-lts-plus.dts b/patch/kernel/archive/rockchip64-6.18/dt/rk3588-nanopc-t6-lts-plus.dts new file mode 100644 index 000000000000..26d39ef56443 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/dt/rk3588-nanopc-t6-lts-plus.dts @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 Thomas McKahan + * Copyright (c) 2024 Linaro Ltd. + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd. + * Copyright (c) 2025 Armbian + * + */ + +/dts-v1/; + +#include "rk3588-nanopc-t6.dtsi" + +/delete-node/ &rt5616; + +/ { + model = "FriendlyElec NanoPC-T6 LTS Plus"; + compatible = "friendlyarm,nanopc-t6-lts-plus", "rockchip,rk3588"; + + /delete-node/ sound; + + sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + + simple-audio-card,name = "everest,es8389-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; + + simple-audio-card,widgets = + "Headphone", "Headphones", + "Microphone", "Microphone Jack"; + simple-audio-card,routing = + "Headphones", "HPOL", + "Headphones", "HPOR", + "INPUT1", "Microphone Jack", + "INPUT2", "Microphone Jack"; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&es8389>; + }; + }; + + /* provide power for on-board USB 2.0 hub */ + vcc5v0_usb20_host: regulator-vcc5v0-usb20-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb20_host_pwren>; + pinctrl-names = "default"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vcc5v0_usb20_host"; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&i2c7 { + es8389: audio-codec@10 { + compatible = "everest,es8389"; + reg = <0x10>; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + }; +}; + +&i2s0_8ch { + /delete-node/ port; +}; + +&pinctrl { + usb { + usb20_host_pwren: usb20-host-pwren { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_usb20_host>; +}; diff --git a/patch/kernel/archive/rockchip64-7.0/dt/rk3588-nanopc-t6-lts-plus.dts b/patch/kernel/archive/rockchip64-7.0/dt/rk3588-nanopc-t6-lts-plus.dts new file mode 100644 index 000000000000..26d39ef56443 --- /dev/null +++ b/patch/kernel/archive/rockchip64-7.0/dt/rk3588-nanopc-t6-lts-plus.dts @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 Thomas McKahan + * Copyright (c) 2024 Linaro Ltd. + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd. + * Copyright (c) 2025 Armbian + * + */ + +/dts-v1/; + +#include "rk3588-nanopc-t6.dtsi" + +/delete-node/ &rt5616; + +/ { + model = "FriendlyElec NanoPC-T6 LTS Plus"; + compatible = "friendlyarm,nanopc-t6-lts-plus", "rockchip,rk3588"; + + /delete-node/ sound; + + sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + + simple-audio-card,name = "everest,es8389-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; + + simple-audio-card,widgets = + "Headphone", "Headphones", + "Microphone", "Microphone Jack"; + simple-audio-card,routing = + "Headphones", "HPOL", + "Headphones", "HPOR", + "INPUT1", "Microphone Jack", + "INPUT2", "Microphone Jack"; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&es8389>; + }; + }; + + /* provide power for on-board USB 2.0 hub */ + vcc5v0_usb20_host: regulator-vcc5v0-usb20-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb20_host_pwren>; + pinctrl-names = "default"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vcc5v0_usb20_host"; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&i2c7 { + es8389: audio-codec@10 { + compatible = "everest,es8389"; + reg = <0x10>; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + }; +}; + +&i2s0_8ch { + /delete-node/ port; +}; + +&pinctrl { + usb { + usb20_host_pwren: usb20-host-pwren { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_usb20_host>; +}; diff --git a/patch/u-boot/v2026.01/add-nanopc-t6-lts-plus-detection.patch b/patch/u-boot/v2026.01/add-nanopc-t6-lts-plus-detection.patch new file mode 100644 index 000000000000..53f4a0e23037 --- /dev/null +++ b/patch/u-boot/v2026.01/add-nanopc-t6-lts-plus-detection.patch @@ -0,0 +1,42 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Igor Pecovnik +Date: Sun, 06 Apr 2026 12:00:00 +0200 +Subject: board: friendlyelec: add NanoPC-T6 LTS Plus support + +Add NanoPC-T6 LTS Plus variant to the ADC-based board detection table. +The LTS Plus reads ~3076 on ADC channel 5, compared to T6 (348-528) +and T6 LTS (1957-2137). Set board_name so the correct model is +displayed during boot. + +Signed-off-by: Igor Pecovnik +--- +--- a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c ++++ b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c +@@ -11,11 +11,13 @@ + unsigned int low; + unsigned int high; + const char *fdtfile; ++ const char *board_name; + }; + + static const struct board_model board_models[] = { +- { 348, 528, "rockchip/rk3588-nanopc-t6.dtb" }, +- { 1957, 2137, "rockchip/rk3588-nanopc-t6-lts.dtb" }, ++ { 348, 528, "rockchip/rk3588-nanopc-t6.dtb", "NanoPC-T6" }, ++ { 1957, 2137, "rockchip/rk3588-nanopc-t6-lts.dtb", "NanoPC-T6 LTS" }, ++ { 2986, 3166, "rockchip/rk3588-nanopc-t6-lts-plus.dtb", "NanoPC-T6 LTS Plus" }, + }; + + static const struct board_model *get_board_model(void) +@@ -42,8 +44,10 @@ + { + const struct board_model *model = get_board_model(); + +- if (model) ++ if (model) { + env_set("fdtfile", model->fdtfile); ++ env_set("board_name", model->board_name); ++ } + + return 0; + } diff --git a/patch/u-boot/v2026.01/dt_uboot/rk3588-nanopc-t6-lts-plus-u-boot.dtsi b/patch/u-boot/v2026.01/dt_uboot/rk3588-nanopc-t6-lts-plus-u-boot.dtsi new file mode 100644 index 000000000000..b18f958c8a28 --- /dev/null +++ b/patch/u-boot/v2026.01/dt_uboot/rk3588-nanopc-t6-lts-plus-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588-nanopc-t6-u-boot.dtsi" diff --git a/patch/u-boot/v2026.01/dt_upstream_rockchip/rk3588-nanopc-t6-lts-plus.dts b/patch/u-boot/v2026.01/dt_upstream_rockchip/rk3588-nanopc-t6-lts-plus.dts new file mode 100644 index 000000000000..b207084ac217 --- /dev/null +++ b/patch/u-boot/v2026.01/dt_upstream_rockchip/rk3588-nanopc-t6-lts-plus.dts @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 Thomas McKahan + * Copyright (c) 2024 Linaro Ltd. + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd. + * Copyright (c) 2025 Armbian + * + */ + +/dts-v1/; + +#include "rk3588-nanopc-t6.dtsi" + +/ { + model = "FriendlyElec NanoPC-T6 LTS Plus"; + compatible = "friendlyarm,nanopc-t6-lts-plus", "rockchip,rk3588"; + + /* provide power for on-board USB 2.0 hub */ + vcc5v0_usb20_host: regulator-vcc5v0-usb20-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb20_host_pwren>; + pinctrl-names = "default"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "vcc5v0_usb20_host"; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&pinctrl { + usb { + usb20_host_pwren: usb20-host-pwren { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&u2phy1 { + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_usb20_host>; +}; + +&usbdp_phy1 { + status = "okay"; +}; + +&usb_host1_xhci { + dr_mode = "host"; + status = "okay"; +};