From 8423b9cf5e58af417ba81963d320c392a7d62f47 Mon Sep 17 00:00:00 2001 From: Aelin Reidel Date: Thu, 12 Mar 2026 15:22:09 +0100 Subject: [PATCH] Actually enable the AIX Extended Altivec ABI in LLVM As far as I can tell, the intent for the powerpc64-ibm-aix target was to enable the AIX Extended Altivec ABI, since `abi` in the target spec was set to `vec-extabi`. This field however has no effect on LLVM codegen and the AIX vector ABI is not set via `llvm_abiname`, but rather enabled in the global TargetOptions struct. Since we only have one AIX target and I believe it should be using the newer ABI, we can unconditionally enable the target option if the target triple is an AIX triple. --- compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp b/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp index a47179c14d27b..a518d5fe50a2b 100644 --- a/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp +++ b/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp @@ -367,6 +367,11 @@ extern "C" LLVMTargetMachineRef LLVMRustCreateTargetMachine( Options.EmitStackSizeSection = EmitStackSizeSection; + // We only support the AIX Extended Altivec ABI and not the legacy AIX ABI. + // This is required for using the non-volatile vector registers. + if (Trip.isOSAIX()) + Options.EnableAIXExtendedAltivecABI = true; + #if LLVM_VERSION_GE(21, 0) TargetMachine *TM = TheTarget->createTargetMachine(Trip, CPU, Feature, Options, RM, CM, OptLevel);