From 2aabd191f7c3464c1f65f76a369bc96e4458022a Mon Sep 17 00:00:00 2001 From: jddark62 Date: Fri, 5 Jun 2026 20:13:23 +0530 Subject: [PATCH] docs: add ESP32 layout routing guide --- .../esp32-pcb-layout-routing-guide.mdx | 323 ++++++++++++++++++ 1 file changed, 323 insertions(+) create mode 100644 docs/tutorials/esp32-pcb-layout-routing-guide.mdx diff --git a/docs/tutorials/esp32-pcb-layout-routing-guide.mdx b/docs/tutorials/esp32-pcb-layout-routing-guide.mdx new file mode 100644 index 00000000..a121f21f --- /dev/null +++ b/docs/tutorials/esp32-pcb-layout-routing-guide.mdx @@ -0,0 +1,323 @@ +--- +title: ESP32 PCB Layout Routing Guide +description: A placement, routing, and fabrication checklist for ESP32 module boards in tscircuit. +--- + +import CircuitPreview from "@site/src/components/CircuitPreview" + +## Overview + +This guide walks through a review-focused ESP32 board layout flow in tscircuit. +It is meant for the point where the schematic is already close, but the board +still needs careful placement, power routing, antenna clearance, and pre-fab +checks. + +The examples use a module-style ESP32 footprint so the layout decisions are easy +to inspect: + +- Place the module at a board edge with the antenna facing outward. +- Reserve a copper-free antenna area before routing any signals. +- Keep the USB input, regulator, and bulk capacitors in one short power path. +- Route 3.3 V and ground first, then route boot, reset, UART, and GPIO signals. +- Use `routingDisabled` while arranging parts, then enable the autorouter for + final checks. + +Espressif's hardware design guidance for ESP32 boards calls out the same review +areas: stable power, reset and boot strapping, clock/RF layout, UART download +connections, and antenna clearance. See the +[ESP32 schematic checklist](https://docs.espressif.com/projects/esp-hardware-design-guidelines/en/latest/esp32/schematic-checklist.html) +when adapting this layout to a production design. + +## Start With Placement + +Begin by putting the ESP32 module on the top edge of the board. The dashed +rectangle marks the antenna keepout. Treat it as a visual contract: no copper +pour, vias, mounting hardware, tall connectors, or noisy power routing should be +placed under the antenna area. + + ( + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + +) +`} +/> + +Use this first preview as a placement review: + +| Region | Placement goal | +| --- | --- | +| Antenna edge | Module antenna at the board edge, with a visible keepout. | +| Input power | USB, regulator, and input/output capacitors grouped tightly. | +| ESP32 decoupling | 100 nF capacitors close to the module 3.3 V and ground pads. | +| Human controls | Boot and reset buttons reachable from the board edge. | +| Programming header | UART header away from the regulator and USB power path. | + +## Route Power Before Signals + +Route power deliberately before asking the autorouter to solve every signal. +Make `VBUS`, `V3_3`, and `GND` wider than normal GPIO traces. The exact width +depends on current, copper weight, and board house rules, but using named nets +with explicit trace widths makes the intent visible in the design. + + ( + + + + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + + + + + + + +) +`} +/> + +Power routing review points: + +- Keep the regulator output path short and direct. +- Put the bulk output capacitor on the same side of the regulator output as the + ESP32 3.3 V route. +- Give each decoupling capacitor a short ground return instead of sending the + return path across the board. +- Avoid sending switching or high-current traces through the antenna keepout. + +## Add Boot, Reset, And UART + +ESP32 download mode depends on the boot strap pins. A practical board should +make `EN`, `IO0`, `TXD0`, `RXD0`, `V3_3`, and `GND` easy to inspect. Put boot and +reset controls close to the module, and cross the external UART header so a USB +UART adapter's `TXD0` connects to ESP32 `RXD0`. + + ( + + + + + + + + + + + + + } + /> + + + + + + + + + + + + + + + + + + + +) +`} +/> + +Before fabrication, verify these nets by name in the schematic and PCB views: + +| Net | Expected route | +| --- | --- | +| `EN` | 10 k pull-up to `V3_3`, reset button to `GND`, short trace to module. | +| `IO0` | 10 k pull-up to `V3_3`, boot button to `GND`, short trace to module. | +| `TXD0` | ESP32 transmit pin to external header receive pin. | +| `RXD0` | ESP32 receive pin to external header transmit pin. | +| `V3_3` | Header power pin tied to regulator output and ESP32 3.3 V rail. | +| `GND` | Header ground, buttons, regulator, capacitors, and module tied together. | + +## Turn Routing Back On + +Keep `routingDisabled` during placement experiments so previews stay quick. +When component positions are stable, remove it and use an autorouter. Start with +`sequential-trace` for a small board, then move to `auto-cloud` or a higher +`autorouterEffortLevel` when the board becomes dense. + +```tsx + + {/* final component placement and traces */} + +``` + +If the router struggles, change placement before adding manual trace paths: + +- Move decoupling capacitors closer to the ESP32 3.3 V and ground pads. +- Rotate the UART header so its pins leave the module without crossing power. +- Move the regulator so `VIN`, `VOUT`, and ground paths are direct. +- Increase board height below the module instead of routing under the antenna. + +## Pre-Fab Review Checklist + +Use this checklist before exporting Gerbers: + +| Area | Acceptance check | +| --- | --- | +| Antenna | Antenna area is on the edge, marked, and free of traces, vias, fills, and tall parts. | +| Power input | USB `VBUS` reaches the regulator with a short, wider trace. | +| 3.3 V rail | Regulator output reaches ESP32 and decoupling capacitors without a long detour. | +| Ground | Decoupling capacitors have short returns and enough ground stitching near the module. | +| Boot mode | `EN` and `IO0` each have pull-ups and a button path to ground. | +| UART | Header `TXD0` and `RXD0` cross to the ESP32 receive/transmit pins. | +| USB data | `D+` and `D-` are kept together and away from regulator copper. | +| Silkscreen | Boot, reset, UART pin order, and antenna keepout are labeled. | + +The main win is to make the important constraints visible in code. A reviewer can +see the keepout, named rails, explicit trace widths, and boot/download nets before +opening a board viewer, and the PCB preview can confirm that the physical layout +matches the ESP32 design intent.