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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
"description: This lesson introduces the course in integrating quantum and high-performance computing and includes a course outline.\n",
"---\n",
"\n",
"{/* cspell:ignore exascale exaflops factorially QRMI Slurm SPANK Iskandar Sitdikov */}\n",
"{/* cspell:ignore exascale exaflops factorially QRMI Slurm SPANK Iskandar Sitdikov QCSC Fugaku ASICs RIKEN */}\n",
"\n",
"## Welcome to the Frontier\n",
"\n",
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"A concrete example is the sample-based quantum diagonalization (SQD) algorithm. This algorithm, which will be explored in Lesson 4, demonstrates how HPC and quantum computing can complement each other in practice. For additional background, see the Quantum Diagonalization Algorithms course on IBM Quantum Learning."
]
},
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"cell_type": "markdown",
"id": "5af93736",
"metadata": {},
"source": [
"## New architecture\n",
"\n",
"IBM’s new quantum‑centric supercomputing (QCSC) reference architecture outlines how quantum processors (QPUs) can integrate directly with CPUs and GPUs in modern HPC environments. The approach is driven by successful hybrid quantum‑classical workflows—such as using the sample‑based quantum diagonalization (SQD) method for molecular simulations—which already show accuracy comparable to advanced classical techniques.\n",
"\n",
"The architecture is designed to be open, modular, and composable so quantum resources can plug into existing HPC workflows without requiring an entirely new stack. Early integrations with systems like RIKEN and Fugaku demonstrate that production‑level hybrid workflows are already feasible. It provides a long‑term framework for evolving quantum‑classical co‑design over the next decade.\n",
"\n",
"![\"Image showing full quantum plus hpc architecture.\"](/learning/images/courses/integrating-quantum-and-high-performance-computing/introduction/qcsc-arch.avif)\n",
"\n",
"The stack includes an application layer that decomposes problems across classical and quantum components, middleware that links classical programming models with quantum circuit generation (e.g., through Qiskit’s updated interfaces), and a system‑orchestration layer that manages hybrid resource scheduling using tools like the Quantum Resource Management Interface (QRMI).\n",
"\n",
"At the hardware level, the architecture defines three tiers:\n",
"* Quantum system with QPUs and low‑latency classical runtimes (FPGAs/ASICs).\n",
"* Co‑located CPU/GPU scale‑up systems connected via near‑time interconnects for tasks like error mitigation.\n",
"* Scale‑out systems providing flexible classical compute for preprocessing, post‑processing, and hybrid workloads.\n",
"\n",
"Overall, IBM positions the QCSC architecture as a practical roadmap for HPC centers to begin incorporating real quantum hardware, enabling more powerful hybrid algorithms and preparing infrastructure for future fault‑tolerant quantum systems. For more on this architecture see the article [here](https://research.ibm.com/blog/quantum-centric-supercomputing-system-reference-architecture)."
]
},
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"cell_type": "markdown",
"id": "56ff3ff9-e36a-42f3-a45e-bb1338a7d9c4",
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