Add GD32H757VSTART FC board config file support#1104
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WalkthroughThis PR introduces a new Betaflight board configuration header for the GD32H757VSTART_V02 flight controller. The file defines the target MCU (GD32H757VI), configures enabled sensor features (gyro, accel, barometer, flash, display), and specifies all hardware pin assignments including motors, communication interfaces (UART, I2C, SPI), LEDs, ADC inputs, and interrupt/chip-select lines for sensors and peripherals. ChangesGD32H757VSTART_V02 Board Configuration
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Actionable comments posted: 3
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@configs/GD32H757VSTART_V02/config.h`:
- Line 72: UART7_TX_PIN and LED1_PIN are both defined as PE1 causing a hardware
pin conflict; check the board schematic to determine which function should keep
PE1 and update the other macro (either UART7_TX_PIN or LED1_PIN) to the correct
GPIO pin per the schematic so they are not the same pin; ensure the updated
definition uses the correct symbol name (UART7_TX_PIN or LED1_PIN) and matches
existing pin naming convention (e.g., PXn) used elsewhere in the file.
- Around line 150-154: The file defines PINIO1_BOX, PINIO2_BOX, PINIO3_BOX and
PINIO1_CONFIG, PINIO2_CONFIG while PINIO1_PIN and PINIO2_PIN are commented out
and PINIO3 has no PIN or CONFIG, so either re-enable the PINIO pins and fully
define PINIO3 (uncomment PINIO1_PIN and PINIO2_PIN, add PINIO3_PIN and
PINIO3_CONFIG consistent with PINIO1_CONFIG/PINIO2_CONFIG) if PINIO is intended,
or remove/comment out PINIO1_BOX, PINIO2_BOX, PINIO3_BOX, PINIO1_CONFIG, and
PINIO2_CONFIG to match the default/no-PINIO usage (ensure PINIO1_PIN, PINIO2_PIN
remain commented if removing).
- Line 78: UART6_RX_PIN is defined as PE7 but ESCSERIAL_PIN also uses PE7,
causing a hardware conflict; change one to a free GPIO (e.g., pick an unused
port/pin like PE8 or another verified free pin on this board) and update the
define for either UART6_RX_PIN or ESCSERIAL_PIN in config.h accordingly,
ensuring the chosen pin does not collide with other peripherals; alternatively
add a conditional guard (e.g., USE_ESCSERIAL or ENABLE_UART6) around the
ESCSERIAL_PIN or UART6_RX_PIN define so only one is active at build time and
document the choice in the config comment.
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configs/GD32H757VSTART_V02/config.h
| #define UART3_TX_PIN PB8 | ||
| #define UART4_TX_PIN PC12 | ||
| #define UART6_TX_PIN PE8 | ||
| #define UART7_TX_PIN PE1 |
There was a problem hiding this comment.
Critical pin conflict: PE1 assigned to both UART7_TX and LED1.
Line 72 defines UART7_TX_PIN as PE1, and line 87 defines LED1_PIN as PE1. The same GPIO pin cannot serve two simultaneous functions. This will cause hardware configuration errors and unpredictable behavior.
🔧 Verify hardware schematic and correct the conflict
Please check the board schematic to determine:
- Which function should actually use PE1
- What the correct pin assignment should be for the other function
Then update one of these definitions accordingly.
Also applies to: 87-87
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
In `@configs/GD32H757VSTART_V02/config.h` at line 72, UART7_TX_PIN and LED1_PIN
are both defined as PE1 causing a hardware pin conflict; check the board
schematic to determine which function should keep PE1 and update the other macro
(either UART7_TX_PIN or LED1_PIN) to the correct GPIO pin per the schematic so
they are not the same pin; ensure the updated definition uses the correct symbol
name (UART7_TX_PIN or LED1_PIN) and matches existing pin naming convention
(e.g., PXn) used elsewhere in the file.
| #define UART2_RX_PIN PD9 | ||
| #define UART3_RX_PIN PB9 | ||
| #define UART4_RX_PIN PD2 | ||
| #define UART6_RX_PIN PE7 |
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🧩 Analysis chain
🏁 Script executed:
#!/bin/bash
# Search for similar PE7 dual-assignment patterns in other board configs
rg -n 'UART6_RX_PIN.*PE7' --type=c -A2 -B2
rg -n 'ESCSERIAL_PIN.*PE7' --type=c -A2 -B2Repository: betaflight/config
Length of output: 659
🏁 Script executed:
# Search for ESCSERIAL_PIN definitions in all board configs to see if pin sharing is common
rg -n 'ESCSERIAL_PIN' --type=c | head -20
# Check for configuration guards around UART6_RX_PIN and ESCSERIAL_PIN
rg -B5 -A5 'UART6_RX_PIN|ESCSERIAL_PIN' configs/GD32H757VSTART_V02/config.hRepository: betaflight/config
Length of output: 1838
🏁 Script executed:
# Search across all board configs for UART6_RX_PIN to see if this pattern appears elsewhere
find configs -name "config.h" -exec grep -l "UART6_RX_PIN" {} \;
find configs -name "config.h" -exec grep -l "ESCSERIAL_PIN" {} \;Repository: betaflight/config
Length of output: 14257
🏁 Script executed:
# Check if there are any conditional definitions or comments indicating mutual exclusivity
rg -B10 'UART6_RX_PIN.*PE7|ESCSERIAL_PIN.*PE7' configs/GD32H757VSTART_V02/config.hRepository: betaflight/config
Length of output: 595
🏁 Script executed:
# Search for any configuration guards or conditional definitions around PE7
rg -B20 'UART6_RX_PIN.*PE7' configs/GD32H757VSTART_V02/config.h | head -40
# Check if there are any comments explaining ESCSERIAL usage
rg -B5 'ESCSERIAL_PIN' configs/GD32H757VSTART_V02/config.h
# Search for any `#ifdef` or feature guards related to ESCSERIAL or UART6
rg '`#ifdef`.*ESCSERIAL|`#ifdef`.*UART6' --type=cRepository: betaflight/config
Length of output: 669
🏁 Script executed:
# Check if there's any other board with the same pin sharing pattern
rg 'UART6_RX_PIN' --type=c -A50 | rg -B50 'ESCSERIAL_PIN.*PE' | grep -E 'configs/|UART6_RX_PIN|ESCSERIAL_PIN'Repository: betaflight/config
Length of output: 6142
Fix PE7 pin conflict: UART6_RX_PIN and ESCSERIAL_PIN both defined as PE7.
This board is the only one in the codebase where UART6_RX_PIN and ESCSERIAL_PIN share the same pin (PE7). All other boards use distinct pins for these functions. Without conditional guards or runtime configuration to disable one, this creates a hardware conflict. Reassign one of these pins to an available GPIO.
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
In `@configs/GD32H757VSTART_V02/config.h` at line 78, UART6_RX_PIN is defined as
PE7 but ESCSERIAL_PIN also uses PE7, causing a hardware conflict; change one to
a free GPIO (e.g., pick an unused port/pin like PE8 or another verified free pin
on this board) and update the define for either UART6_RX_PIN or ESCSERIAL_PIN in
config.h accordingly, ensuring the chosen pin does not collide with other
peripherals; alternatively add a conditional guard (e.g., USE_ESCSERIAL or
ENABLE_UART6) around the ESCSERIAL_PIN or UART6_RX_PIN define so only one is
active at build time and document the choice in the config comment.
| #define PINIO1_BOX 40 | ||
| #define PINIO2_BOX 41 | ||
| #define PINIO3_BOX 42 | ||
| #define PINIO1_CONFIG 129 | ||
| #define PINIO2_CONFIG 129 |
There was a problem hiding this comment.
Inconsistent PINIO configuration: boxes and configs defined but pins are commented out.
Lines 150-154 define PINIO1_BOX, PINIO2_BOX, PINIO3_BOX, PINIO1_CONFIG, and PINIO2_CONFIG, but the actual PINIO pins (PINIO1_PIN and PINIO2_PIN) are commented out on lines 116-117. Additionally, PINIO3_BOX is defined without a corresponding PINIO3_CONFIG or PINIO3_PIN.
Based on learnings, config.h should only define settings that differ from defaults. If PINIO functionality is not being used (pins commented), the box and config macros should also be removed or commented out.
🔧 Recommended fix
Either uncomment the PINIO pins if the functionality is intended:
-// `#define` PINIO1_PIN PD10
-// `#define` PINIO2_PIN PD11
+#define PINIO1_PIN PD10
+#define PINIO2_PIN PD11
+#define PINIO3_PIN <appropriate_pin> // Add if PINIO3 is needed
+#define PINIO3_CONFIG 129 // Add if PINIO3 is neededOr remove/comment out the unused PINIO configuration:
-#define PINIO1_BOX 40
-#define PINIO2_BOX 41
-#define PINIO3_BOX 42
-#define PINIO1_CONFIG 129
-#define PINIO2_CONFIG 129
+// `#define` PINIO1_BOX 40
+// `#define` PINIO2_BOX 41
+// `#define` PINIO3_BOX 42
+// `#define` PINIO1_CONFIG 129
+// `#define` PINIO2_CONFIG 129📝 Committable suggestion
‼️ IMPORTANT
Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.
| #define PINIO1_BOX 40 | |
| #define PINIO2_BOX 41 | |
| #define PINIO3_BOX 42 | |
| #define PINIO1_CONFIG 129 | |
| #define PINIO2_CONFIG 129 | |
| // `#define` PINIO1_BOX 40 | |
| // `#define` PINIO2_BOX 41 | |
| // `#define` PINIO3_BOX 42 | |
| // `#define` PINIO1_CONFIG 129 | |
| // `#define` PINIO2_CONFIG 129 |
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
In `@configs/GD32H757VSTART_V02/config.h` around lines 150 - 154, The file defines
PINIO1_BOX, PINIO2_BOX, PINIO3_BOX and PINIO1_CONFIG, PINIO2_CONFIG while
PINIO1_PIN and PINIO2_PIN are commented out and PINIO3 has no PIN or CONFIG, so
either re-enable the PINIO pins and fully define PINIO3 (uncomment PINIO1_PIN
and PINIO2_PIN, add PINIO3_PIN and PINIO3_CONFIG consistent with
PINIO1_CONFIG/PINIO2_CONFIG) if PINIO is intended, or remove/comment out
PINIO1_BOX, PINIO2_BOX, PINIO3_BOX, PINIO1_CONFIG, and PINIO2_CONFIG to match
the default/no-PINIO usage (ensure PINIO1_PIN, PINIO2_PIN remain commented if
removing).
1 participant
Add support for GD32H757V Start FC boards config file.
It has been successfully compiled and completed basic functionality testing on relevant hardware.
Summary by CodeRabbit