CUDA: enable cuda support v1 - EAGER with GDR COPY#20
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- for pipeline rndv transfers
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| /** | |||
| * Copyright (C) Mellanox Technologies Ltd. 2001-2015. ALL RIGHTS RESERVED. | |||
| ucm_debug("cudamem test: got 0x%x out of 0x%x, total: 0x%x", out_events, events, | ||
| installed_events); | ||
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| /* Return success iff we caught all wanted events */ |
| #include <pthread.h> | ||
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| #define MAP_FAILED ((void*)-1) |
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is it required? MAP_FAILED is defined in <sys/mman.h>, and MAP_FAILED is not used here
| iface_attr = &worker->ifaces[rsc_index].attr; | ||
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| domain_config->tag.eager.max_short = iface_attr->cap.am.max_short; | ||
| //TODO: zcopy thrshold should be based on the ep AM lane capability with domain addr(i.e can UCT do zcopy from domain) |
| } ucp_ep_rma_config_t; | ||
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| #define UCP_IS_DEFAULT_ADDR_DOMAIN(_addr_dn_h) (_addr_dn_h == &ucp_addr_dn_dummy_handle) |
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(_addr_dn_h == &ucp_addr_dn_dummy_handle) -> ((_addr_dn_h) == &ucp_addr_dn_dummy_handle)
| return UCS_OK; | ||
| } | ||
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| while(1) { |
| rreq->recv.length, &rreq->recv.state, | ||
| data + hdr_len, recv_len, 1); | ||
| status = ucp_dt_unpack(rreq, rreq->recv.datatype, rreq->recv.buffer, | ||
| rreq->recv.length, &rreq->recv.state, |
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| dn_md_map = addr_dn_h->md_map; | ||
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| while(1) { |
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coding guide line: space after while: while (1) {
| uct_cuda_copy_event_desc_t *cuda_event; | ||
| cudaError_t result = cudaSuccess; | ||
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| ucs_queue_for_each_safe(cuda_event, iter, &iface->pending_event_q, queue) |
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coding guideline: ucs_queue_for_each_safe() {
| ucs_error("cudaEventCreateWithFlags Failed"); | ||
| } | ||
| } | ||
| void uct_cuda_copy_event_desc_cleanup(ucs_mpool_t *mp, void *obj) |
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you don't call these functions directly by name from anywhere, may be declare it as 'static'?
| size_t max_alloc; /**< Maximal allocation size */ | ||
| size_t max_reg; /**< Maximal registration size */ | ||
| uint64_t flags; /**< UCT_MD_FLAG_xx */ | ||
| uct_addr_domain_t addr_dn; /**< Supported addr domain */ |
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change to uct_memory_domain_t
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or memory_type , memory_kind
| typedef enum { | ||
| UCT_MD_ADDR_DOMAIN_CUDA = 0, /**< NVIDIA CUDA domain */ | ||
| UCT_MD_ADDR_DOMAIN_DEFAULT, /**< Default system domain */ | ||
| UCT_MD_ADDR_DOMAIN_LAST = UCT_MD_ADDR_DOMAIN_DEFAULT |
| UCT_MD_FLAG_SOCKADDR = UCS_BIT(7), /**< MD support for client-server | ||
| connection establishment via | ||
| sockaddr */ | ||
| UCT_MD_FLAG_ADDR_DN = UCS_BIT(8) /**< MD supports memory addr domain |
| * Return UCS_OK if address belongs to MDs address domain | ||
| * | ||
| * @param [in] md Memory domain to register memory on. | ||
| * @param [in] address Memory address to detect. |
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add to ucx_info to show memory detect support
| /*TODO: return if no MDs with address domain detect */ | ||
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| for (md_index = 0; md_index < context->num_mds; ++md_index) { | ||
| if (context->tl_mds[md_index].attr.cap.flags & UCT_MD_FLAG_ADDR_DN) { |
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remove cap flag and use UCT_MD_ADDR_DOMAIN_DEFAULT
| struct ucp_request { | ||
| ucs_status_t status; /* Operation status */ | ||
| uint16_t flags; /* Request flags */ | ||
| ucp_addr_dn_h addr_dn_h; /* Memory domain handle */ |
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embeded fields into req struct
| ucp_ep_config(ep)->tag.eager.max_short, | ||
| ucp_ep_config(ep)->tag.eager.zcopy_thresh, | ||
| ucs_likely(UCP_IS_DEFAULT_ADDR_DOMAIN(addr_dn_h)) ? | ||
| ucp_ep_config(ep)->tag.eager.max_short : |
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array of eager threshold per domain
| buffer, count, tag, ucp_ep_peer_name(ep), cb); | ||
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| if (ucs_likely(UCP_DT_IS_CONTIG(datatype))) { | ||
| ucp_addr_domain_detect_mds(ep->worker->context, (void *)buffer, &addr_dn_h); |
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global context value to check if detect is needed or not
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