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[MCXA] Bump nxp-pac and use PascalCase for all enum variants #5908

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Merged
Wassasin merged 3 commits into from
Apr 20, 2026
Merged

[MCXA] Bump nxp-pac and use PascalCase for all enum variants #5908

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90671ff
Reworked HAL to fit new PAC standards
Wassasin Apr 15, 2026
86e90cf
Fix examples & tests
Wassasin Apr 20, 2026
c5d7137
Rename lpspi::Prescale::Divideby to lpspi::Prescale::DivideBy
Wassasin Apr 20, 2026
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4 changes: 2 additions & 2 deletions embassy-mcxa/Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -59,15 +59,15 @@ grounded = { version = "0.2.1", features = ["cas", "critical-section"] }
heapless = "0.9"
maitake-sync = { version = "0.3.0", default-features = false, features = ["critical-section", "no-cache-pad"] }
nb = "1.1.0"
nxp-pac = { git = "https://github.com/embassy-rs/nxp-pac.git", rev = "10e7c2432894ab6bd4ce9d0168d4184eebc61925", features = ["rt"] }
nxp-pac = { git = "https://github.com/embassy-rs/nxp-pac.git", rev = "be247ebf87b698532313c685103607036e512291", features = ["rt"] }
paste = "1.0.15"

rand-core-06 = { package = "rand_core", version = "0.6" }
rand-core-09 = { package = "rand_core", version = "0.9" }
rand-core-10 = { package = "rand_core", version = "0.10" }

[build-dependencies]
nxp-pac = { git = "https://github.com/embassy-rs/nxp-pac.git", rev = "10e7c2432894ab6bd4ce9d0168d4184eebc61925", default-features = false, features = ["metadata"] }
nxp-pac = { git = "https://github.com/embassy-rs/nxp-pac.git", rev = "be247ebf87b698532313c685103607036e512291", default-features = false, features = ["metadata"] }
proc-macro2 = "1.0.106"
quote = "1.0.45"
regex = "1.12.3"
Expand Down
14 changes: 7 additions & 7 deletions embassy-mcxa/build.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -228,7 +228,7 @@ fn generate_clkout_impls() -> TokenStream {
for signal in clkout.signals {
for pin in signal.pins {
let pin_name = format_ident!("{}", pin.pin);
let mux = format_ident!("MUX{}", pin.alt);
let mux = format_ident!("Mux{}", pin.alt);
let feature_gate = pin_feature_gate(pin.pin);

generated.extend(quote! {
Expand All @@ -252,7 +252,7 @@ fn generate_lpi2c_pin_impls() -> TokenStream {
let signal_pin = format_ident!("{}Pin", ccase!(pascal, signal.name));
for pin in signal.pins {
let pin_name = format_ident!("{}", pin.pin);
let mux = format_ident!("MUX{}", pin.alt);
let mux = format_ident!("Mux{}", pin.alt);
let feature_gate = pin_feature_gate(pin.pin);

generated.extend(quote! {
Expand All @@ -276,7 +276,7 @@ fn generate_i3c_pin_impls() -> TokenStream {
let signal_pin = format_ident!("{}Pin", ccase!(pascal, signal.name));
for pin in signal.pins {
let pin_name = format_ident!("{}", pin.pin);
let mux = format_ident!("MUX{}", pin.alt);
let mux = format_ident!("Mux{}", pin.alt);
let feature_gate = pin_feature_gate(pin.pin);

generated.extend(quote! {
Expand All @@ -300,7 +300,7 @@ fn generate_spi_pin_impls() -> TokenStream {
let signal_pin = format_ident!("{}Pin", ccase!(pascal, signal.name));
for pin in signal.pins {
let pin_name = format_ident!("{}", pin.pin);
let mux = format_ident!("MUX{}", pin.alt);
let mux = format_ident!("Mux{}", pin.alt);
let feature_gate = pin_feature_gate(pin.pin);

generated.extend(quote! {
Expand Down Expand Up @@ -332,13 +332,13 @@ fn generate_ctimer_pin_impls() -> TokenStream {
if signal.name.starts_with("INP") {
for pin in signal.pins {
let pin_name = format_ident!("{}", pin.pin);
let mux = format_ident!("MUX{}", pin.alt);
let mux = format_ident!("Mux{}", pin.alt);
inp_pins.insert(pin_name, mux);
}
} else if let Some(match_index) = get_regex_num(signal.name, &match_channel_regex) {
for pin in signal.pins {
let pin_name = format_ident!("{}", pin.pin);
let mux = format_ident!("MUX{}", pin.alt);
let mux = format_ident!("Mux{}", pin.alt);
let feature_gate = pin_feature_gate(pin.pin);

mat_pins.insert(pin_name.clone(), mux);
Expand Down Expand Up @@ -383,7 +383,7 @@ fn generate_lpuart_pin_impls() -> TokenStream {
let signal_name = format_ident!("{}", signal.name);
for pin in signal.pins {
let pin_name = format_ident!("{}", pin.pin);
let mux = format_ident!("MUX{}", pin.alt);
let mux = format_ident!("Mux{}", pin.alt);
let feature_gate = pin_feature_gate(pin.pin);

generated.extend(quote! {
Expand Down
62 changes: 31 additions & 31 deletions embassy-mcxa/src/adc.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ use crate::clocks::{ClockError, Gate, PoweredClock, WakeGuard, enable_and_reset}
use crate::gpio::{AnyPin, GpioPin, SealedPin};
use crate::interrupt::typelevel::{Handler, Interrupt};
use crate::pac::adc::{
Avgs, CalAvgs, CalRdy, CalReq, Calofs, Cmpen, Dozen, Gcc0rdy, HptExdi, Loop as HwLoop, Mode as ConvMode, Next,
Avgs, CalAvgs, CalRdy, CalReq, Calofs, Cmpen, Dozen, Gcc0Rdy, HptExdi, Loop as HwLoop, Mode as ConvMode, Next,
Pwrsel, Refsel, Rst, Rstfifo0, Sts, Tcmd, Tpri, Tprictrl,
};
use crate::pac::port::Mux;
Expand Down Expand Up @@ -100,11 +100,11 @@ impl Default for Config {
fn default() -> Self {
Self {
enable_in_doze_mode: true,
calibration_average_mode: CalAvgs::NO_AVERAGE,
calibration_average_mode: CalAvgs::NoAverage,
power_pre_enabled: false,
power_up_delay: 0x80,
reference_voltage_source: Default::default(),
power_level_mode: Pwrsel::LOWEST,
power_level_mode: Pwrsel::Lowest,
trigger_priority_policy: TriggerPriorityPolicy::ConvPreemptImmediatelyNotAutoResumed,
conv_pause_delay: None,
power: PoweredClock::NormalEnabledDeepSleepDisabled,
Expand Down Expand Up @@ -168,9 +168,9 @@ pub enum Compare {
impl Compare {
fn cmp_en(&self) -> Cmpen {
match self {
Compare::Disabled => Cmpen::DISABLED_ALWAYS_STORE_RESULT,
Compare::StoreIf(_) => Cmpen::COMPARE_RESULT_STORE_IF_TRUE,
Compare::SkipUntil(_) => Cmpen::COMPARE_RESULT_KEEP_CONVERTING_UNTIL_TRUE_STORE_IF_TRUE,
Compare::Disabled => Cmpen::DisabledAlwaysStoreResult,
Compare::StoreIf(_) => Cmpen::CompareResultStoreIfTrue,
Compare::SkipUntil(_) => Cmpen::CompareResultKeepConvertingUntilTrueStoreIfTrue,
}
}

Expand Down Expand Up @@ -321,10 +321,10 @@ impl Default for CommandConfig {
fn default() -> Self {
Self {
chained_command: None,
averaging: Avgs::NO_AVERAGE,
sample_time: Sts::SAMPLE_3P5,
averaging: Avgs::NoAverage,
sample_time: Sts::Sample3p5,
compare: Compare::Disabled,
resolution: ConvMode::DATA_12_BITS,
resolution: ConvMode::Data12Bits,
wait_for_trigger: false,
}
}
Expand All @@ -350,7 +350,7 @@ impl Default for Trigger {
Trigger {
target_command_id: CommandId::Cmd1,
delay_power: 0,
priority: Tpri::HIGHEST_PRIORITY,
priority: Tpri::HighestPriority,
enable_hardware_trigger: false,
resync: false,
synchronous: false,
Expand Down Expand Up @@ -470,7 +470,7 @@ impl<'a> Adc<'a, Async> {
// Enable the interrupts. They get disabled in the interrupt handler
self.info.regs().ie().write(|reg| {
reg.set_fwmie0(true);
reg.set_tcomp_ie(TcompIe::ALL_TRIGGER_COMPLETES_ENABLED);
reg.set_tcomp_ie(TcompIe::AllTriggerCompletesEnabled);
});

match self.try_get_conversion() {
Expand All @@ -494,7 +494,7 @@ impl<'a> Adc<'a, Async> {
// Enable the interrupts. They get disabled in the interrupt handler
self.info.regs().ie().write(|reg| {
reg.set_fwmie0(true);
reg.set_tcomp_ie(TcompIe::ALL_TRIGGER_COMPLETES_ENABLED);
reg.set_tcomp_ie(TcompIe::AllTriggerCompletesEnabled);
});

match self.try_get_conversion() {
Expand Down Expand Up @@ -536,7 +536,7 @@ impl<'a, M: Mode> Adc<'a, M> {
self.info
.regs()
.ctrl()
.modify(|w| w.set_rstfifo0(Rstfifo0::TRIGGER_RESET));
.modify(|w| w.set_rstfifo0(Rstfifo0::TriggerReset));
}

/// Get conversion result from FIFO.
Expand All @@ -547,7 +547,7 @@ impl<'a, M: Mode> Adc<'a, M> {
/// - [Error::FifoPending] if the FIFO is empty, but the adc is active
pub fn try_get_conversion(&mut self) -> Result<Conversion, Error> {
if self.info.regs().fctrl0().read().fcount() == 0 {
if self.info.regs().stat().read().adc_active() == AdcActive::BUSY {
if self.info.regs().stat().read().adc_active() == AdcActive::Busy {
return Err(Error::FifoPending);
}
return Err(Error::FifoEmpty);
Expand Down Expand Up @@ -597,20 +597,20 @@ impl<'a, M: Mode> Adc<'a, M> {
let adc = info.regs();

/* Reset the module. */
adc.ctrl().modify(|w| w.set_rst(Rst::HELD_IN_RESET));
adc.ctrl().modify(|w| w.set_rst(Rst::RELEASED_FROM_RESET));
adc.ctrl().modify(|w| w.set_rst(Rst::HeldInReset));
adc.ctrl().modify(|w| w.set_rst(Rst::ReleasedFromReset));

adc.ctrl().modify(|w| w.set_rstfifo0(Rstfifo0::TRIGGER_RESET));
adc.ctrl().modify(|w| w.set_rstfifo0(Rstfifo0::TriggerReset));

/* Disable the module before setting configuration. */
adc.ctrl().modify(|w| w.set_adcen(false));

/* Configure the module generally. */
adc.ctrl().modify(|w| {
w.set_dozen(if config.enable_in_doze_mode {
Dozen::ENABLED
Dozen::Enabled
} else {
Dozen::DISABLED
Dozen::Disabled
})
});

Expand All @@ -626,11 +626,11 @@ impl<'a, M: Mode> Adc<'a, M> {
w.set_tprictrl(match config.trigger_priority_policy {
TriggerPriorityPolicy::ConvPreemptSoftlyNotAutoResumed
| TriggerPriorityPolicy::ConvPreemptSoftlyAutoRestarted
| TriggerPriorityPolicy::ConvPreemptSoftlyAutoResumed => Tprictrl::FINISH_CURRENT_ON_PRIORITY,
| TriggerPriorityPolicy::ConvPreemptSoftlyAutoResumed => Tprictrl::FinishCurrentOnPriority,
TriggerPriorityPolicy::ConvPreemptSubsequentlyNotAutoResumed
| TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoRestarted
| TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoResumed => Tprictrl::FINISH_SEQUENCE_ON_PRIORITY,
_ => Tprictrl::ABORT_CURRENT_ON_PRIORITY,
| TriggerPriorityPolicy::ConvPreemptSubsequentlyAutoResumed => Tprictrl::FinishSequenceOnPriority,
_ => Tprictrl::AbortCurrentOnPriority,
});
w.set_tres(matches!(
config.trigger_priority_policy,
Expand All @@ -649,8 +649,8 @@ impl<'a, M: Mode> Adc<'a, M> {
| TriggerPriorityPolicy::TriggerPriorityExceptionDisabled
));
w.set_hpt_exdi(match config.trigger_priority_policy {
TriggerPriorityPolicy::TriggerPriorityExceptionDisabled => HptExdi::DISABLED,
_ => HptExdi::ENABLED,
TriggerPriorityPolicy::TriggerPriorityExceptionDisabled => HptExdi::Disabled,
_ => HptExdi::Enabled,
});
});

Expand Down Expand Up @@ -730,10 +730,10 @@ impl<'a, M: Mode> Adc<'a, M> {
self.info
.regs()
.ctrl()
.modify(|w| w.set_calofs(Calofs::OFFSET_CALIBRATION_REQUEST_PENDING));
.modify(|w| w.set_calofs(Calofs::OffsetCalibrationRequestPending));

// Wait for calibration to complete (polling status register)
while self.info.regs().stat().read().cal_rdy() == CalRdy::NOT_SET {}
while self.info.regs().stat().read().cal_rdy() == CalRdy::NotSet {}
}

/// Calculate gain conversion result from gain adjustment factor.
Expand Down Expand Up @@ -766,9 +766,9 @@ impl<'a, M: Mode> Adc<'a, M> {
self.info
.regs()
.ctrl()
.modify(|w| w.set_cal_req(CalReq::CALIBRATION_REQUEST_PENDING));
.modify(|w| w.set_cal_req(CalReq::CalibrationRequestPending));

while self.info.regs().gcc0().read().rdy() == Gcc0rdy::GAIN_CAL_NOT_VALID {}
while self.info.regs().gcc0().read().rdy() == Gcc0Rdy::GainCalNotValid {}

let mut gcca = self.info.regs().gcc0().read().gain_cal() as u32;
if gcca & 0x8000 != 0 {
Expand All @@ -783,7 +783,7 @@ impl<'a, M: Mode> Adc<'a, M> {
self.info.regs().gcr0().modify(|w| w.set_rdy(true));

// Wait for calibration to complete (polling status register)
while self.info.regs().stat().read().cal_rdy() == CalRdy::NOT_SET {}
while self.info.regs().stat().read().cal_rdy() == CalRdy::NotSet {}
}
}

Expand Down Expand Up @@ -816,7 +816,7 @@ impl<T: Instance> Handler<T::Interrupt> for InterruptHandler<T> {
T::info()
.regs()
.stat()
.write(|reg| reg.set_tcomp_int(TcompInt::COMPLETION_DETECTED));
.write(|reg| reg.set_tcomp_int(TcompInt::CompletionDetected));
T::info().wait_cell().wake();
}
}
Expand Down Expand Up @@ -920,7 +920,7 @@ impl<T> AnyAdcPin<T> {
pin.set_pull(crate::gpio::Pull::Disabled);
pin.set_slew_rate(crate::gpio::SlewRate::Fast.into());
pin.set_drive_strength(crate::gpio::DriveStrength::Normal.into());
pin.set_function(Mux::MUX0);
pin.set_function(Mux::Mux0);
}
}

Expand Down
20 changes: 10 additions & 10 deletions embassy-mcxa/src/cdog.rs
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Expand Up @@ -45,9 +45,9 @@ pub enum FaultControl {
impl From<FaultControl> for Ctrl {
fn from(val: FaultControl) -> Self {
match val {
FaultControl::EnableReset => Ctrl::ENABLE_RESET,
FaultControl::EnableInterrupt => Ctrl::ENABLE_INTERRUPT,
FaultControl::DisableBoth => Ctrl::DISABLE_BOTH,
FaultControl::EnableReset => Ctrl::EnableReset,
FaultControl::EnableInterrupt => Ctrl::EnableInterrupt,
FaultControl::DisableBoth => Ctrl::DisableBoth,
}
}
}
Expand Down Expand Up @@ -131,7 +131,7 @@ impl<'d> Watchdog<'d> {
// The clearing method depends on whether the module is locked:
// - Unlocked (LOCK_CTRL = 10b): Write flag values directly
// - Locked (LOCK_CTRL = 01b): Write '1' to clear individual flags
let b = info.control().read().lock_ctrl() == LockCtrl::LOCKED;
let b = info.control().read().lock_ctrl() == LockCtrl::Locked;
// Locked mode: write '1' to clear each flag
info.flags().write(|w| {
w.set_to_flag(b);
Expand All @@ -153,20 +153,20 @@ impl<'d> Watchdog<'d> {

// IRQ pause control
match config.irq_pause {
PauseControl::RunTimer => w.set_irq_pause(IrqPause::RUN_TIMER),
PauseControl::PauseTimer => w.set_irq_pause(IrqPause::PAUSE_TIMER),
PauseControl::RunTimer => w.set_irq_pause(IrqPause::RunTimer),
PauseControl::PauseTimer => w.set_irq_pause(IrqPause::PauseTimer),
};

// Debug halt control
match config.debug_halt {
PauseControl::RunTimer => w.set_debug_halt_ctrl(DebugHaltCtrl::RUN_TIMER),
PauseControl::PauseTimer => w.set_debug_halt_ctrl(DebugHaltCtrl::PAUSE_TIMER),
PauseControl::RunTimer => w.set_debug_halt_ctrl(DebugHaltCtrl::RunTimer),
PauseControl::PauseTimer => w.set_debug_halt_ctrl(DebugHaltCtrl::PauseTimer),
};

// Lock control
match config.lock {
LockControl::Locked => w.set_lock_ctrl(LockCtrl::LOCKED),
LockControl::Unlocked => w.set_lock_ctrl(LockCtrl::UNLOCKED),
LockControl::Locked => w.set_lock_ctrl(LockCtrl::Locked),
LockControl::Unlocked => w.set_lock_ctrl(LockCtrl::Unlocked),
}
});

Expand Down
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