Support aarch64 / arm architectures (e.g. AWS Graviton) - #76
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The package previously forced a build failure on non-x86 architectures via an unsatisfiable `base < 0` constraint, because the C sources and compiler flags assumed x86 SIMD intrinsics. This makes the library build and run on aarch64 / arm, falling back to the pure-Haskell "Stock" implementations: - cabal: only emit the x86 instruction-set flags (-mavx2, -mbmi2, -msse4.2) when building for an x86 target (arch(x86_64) || arch(i386)); remove the `base < 0` block. - cbits/simd_avx2.c: guard the x86 intrinsic includes behind AVX2_ENABLED (the function bodies were already so guarded, so they become no-ops). - cbits/simd_sse2.c: guard the unbound sse_cmpeq8 and its intrinsic includes behind __x86_64__ / __i386__. - CI: add an ubuntu-24.04-arm runner and disambiguate the cabal-cache key by runner.arch (x86_64 and aarch64 Linux otherwise share runner.os). Verified on aarch64: library builds and the hspec/hedgehog test suite passes.
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Summary
Adds support for non-x86 architectures (notably
aarch64/ arm, e.g. AWS Graviton on Linux). Previously the package forced a build failure on ARM via an unsatisfiablebase < 0constraint, because the C sources and compiler flags assumed x86 SIMD intrinsics.On non-x86 targets the library now builds and runs using the existing pure-Haskell Stock implementations (the dispatch in
Comparison/Logicalalready falls back toStockwheneveravx2EnabledisFalse). x86 behaviour is unchanged.Changes
hw-simd.cabal: only emit the x86 instruction-set flags (-mavx2,-mbmi2,-msse4.2) when building for an x86 target (arch(x86_64) || arch(i386)); remove thebase < 0ARM block.cbits/simd_avx2.c: guard the x86 intrinsic includes (immintrin.h,mmintrin.h) behindAVX2_ENABLED. The function bodies were already guarded byAVX2_ENABLED, so on non-x86 they compile to no-ops.cbits/simd_sse2.c: guard the (unbound)sse_cmpeq8and its intrinsic includes behind__x86_64__ / __i386__. This function is not bound from Haskell.ubuntu-24.04-armrunner and disambiguate the cabal-cachearchive-uribyrunner.arch(x86_64 and aarch64 Linux otherwise sharerunner.os == Linux).0.1.3.0+ ChangeLog entry.Verification
Built and tested locally on
aarch64:cabal build lib:hw-simd— succeeds.cabal test all— both suites pass (hw-simd-testhspec/hedgehog: 3 examples, 0 failures;doctest: pass).+bmi2-flagged sibling deps (bits-extra,hw-rankselect*) also build on aarch64, so the dependency chain is Graviton-ready.Notes / follow-up
This PR provides functional (correct, scalar) support on ARM via the Stock path. Actual ARM SIMD acceleration (NEON implementations behind a
neonflag, mirroring the AVX2 structure) is left as a possible follow-up.