Skip to content

feat(ssa): elide overflow check dominated by a later checked add (#7161) - #13315

Draft
jeswr wants to merge 1 commit into
noir-lang:masterfrom
jeswr:feat/elide-overflow-check-dominated
Draft

feat(ssa): elide overflow check dominated by a later checked add (#7161)#13315
jeswr wants to merge 1 commit into
noir-lang:masterfrom
jeswr:feat/elide-overflow-check-dominated

Conversation

@jeswr

@jeswr jeswr commented Jul 10, 2026

Copy link
Copy Markdown

🤖 Automated agent PR on behalf of @jeswr, who reviews before this is marked ready. Developed with support from generative AI; I am reviewing it before requesting maintainer review.

Addresses #7161. In ACIR functions, checked_to_unchecked elides the overflow check of an intermediate checked add whose single-use result feeds a later checked add in the same block (a monotone add chain): over the field, if the intermediate overflows so does the dominating add, so the later range check rejects exactly the same inputs. Gated to ACIR because Brillig wraps and traps per-op, so eliding would move the failure point (the Brillig caveat noted in the issue) — mirrors check_u128_mul_overflow.

Measured (bb gates -s ultra_honk, before → after; base beta.22 0df14918):

circuit ACIR opcodes gates
focused fixture 11 → 7 2777 → 2772
an f64-filter circuit 266 → 262 3617 → 3608
sha512 / poseidon2 / eddsa unchanged unchanged

Caveat: on some circuits the eliminated checks are already absorbed by the ACVM redundant_range optimizer + backend, so the ACIR drop doesn't always reach the gate count; no circuit regresses, and sha512_100_bytes compile time is within noise.

Soundness argument + guards

An intermediate add v is elided only when: v is used exactly once (no leak of the un-range-checked field value), that use is an operand of a checked add in the same block under the same side-effects predicate (an EnableSideEffectsIf between the two prevents elision), v is unsigned, and the dominating consumer is an add (mul's other operand may be 0; sub isn't monotone). New unit tests cover the positive chains and each negative case; cargo test -p noirc_evaluator is green; the existing opt/hint.rs fixture (a 5-add chain) exercises it and its snapshot is updated.

@github-actions

Copy link
Copy Markdown
Contributor

Thank you for your contribution to the Noir language.

Please do not force push to this branch after the Noir team have started review of this PR. Doing so will only delay us merging your PR as we will need to start the review process from scratch.

Thanks for your understanding.

@jeswr

jeswr commented Jul 10, 2026

Copy link
Copy Markdown
Author

🤖 SPARQ agent (automated), acting for @jeswr.

@jeswr — draft ready for your review before it goes up. This is a fresh re-derivation of the #7161 dominated-overflow-check elision, gated ACIR-only per the Brillig caveat in the issue body. Measured tables + full soundness argument are in the PR description. It stays a draft until you flip it.

…r-lang#7161)

In ACIR functions, `checked_to_unchecked` now elides the overflow check of
an intermediate checked `add` when its single-use result is consumed by a
later checked `add` in the same block under the same side-effects predicate
(a monotone add chain).

Over the field, arithmetic does not wrap: a checked op's overflow is enforced
solely by the range check on its result. If `v = a + b` overflows
(`a + b >= 2^bit_size`) then any `w = v + z` with `z >= 0` also overflows, so
`w`'s range check rejects exactly the inputs `v`'s check would have. The
accepted-witness set and observable outputs are unchanged, and one range
decomposition is saved per elided intermediate check.

The reasoning is ACIR-specific and the pass is gated to ACIR functions
(mirroring `check_u128_mul_overflow` and the other passes that reason about
the ACIR-vs-Brillig overflow split). In Brillig, integer arithmetic wraps at
`bit_size` and a checked op traps at its own location, so eliding an
intermediate check would change the observable failure point; Brillig
functions keep every check and execute identically.

Soundness guards for eliding an intermediate add `v`:
- `v` is used exactly once across the function (no leak of the un-range-checked
  value into any other instruction, terminator or return);
- that use is an operand of a checked `add` in the same block and under the
  same predicate epoch (an `EnableSideEffectsIf` between them prevents elision);
- `v` is unsigned and the dominating consumer is an `add` (monotone; `mul`/`sub`
  are excluded).

Measured (bb gates -s ultra_honk, before -> after): focused fixture 2777 ->
2772; no package regresses. ACIR opcodes drop on several real circuits
(e.g. -11 / -10 / -10 on chained-arithmetic kernels) though the backend's
redundant-range optimizer absorbs some of those at the gate level. Compile
time on sha512_100_bytes is within noise.

This change was developed with support from generative AI. I am currently
reviewing it before requesting maintainer review.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
@jeswr
jeswr force-pushed the feat/elide-overflow-check-dominated branch from ef30ba8 to d4bec64 Compare July 10, 2026 05:22
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant