Shikra hdmi lt9611uxd - #1808
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… support Enable the Shikra MDSS display subsystem on the Qualcomm Shikra IQS EVK board and add the Lontium LT9611UXD DSI-to-HDMI bridge node. The LT9611UXD is connected via I2C (bus 4, address 0x41), powered by a GPIO-controlled 3.3V regulator (PM8150 GPIO4) and an always-on 1.8V rail. Reset is on GPIO76 and interrupt on GPIO85. The bridge receives DSI output from MDSS and drives an HDMI-A connector, with the link wired as: DPU -> DSI0 -> LT9611UXD -> HDMI. Link: https://lore.kernel.org/all/20260728-shikra-work-v3-1-e08c322596ac@oss.qualcomm.com/ Signed-off-by: Mohit Dsor <mohit.dsor@oss.qualcomm.com>
…ors and pinctrl Rename lt9611-specific regulator and pinctrl labels to more generic names to decouple them from the bridge chip: - vreg_lt9611_vcc -> vreg_disp_3p3 - vreg_lt9611_vdd removed (vdd now sourced from pm8150_s4) - hdmi_reg_en -> lcd_bias_en - lt9611_irq_pin -> bridge_irq_pin - lt9611_rst_pin -> bridge_rst_pin - Add hdmi_connector label to hdmi-connector node Signed-off-by: Mohit Dsor <mohit.dsor@oss.qualcomm.com>
…port Add DT overlay files and Makefile entries for: - shikra-cqm-evk-hdmi: CQM EVK with LT9611UXD HDMI bridge overlay - shikra-cqs-evk-hdmi: CQS EVK with LT9611UXD HDMI bridge overlay - shikra-iqs-evk-dlc-panel: IQS EVK with DLC panel overlay Signed-off-by: Mohit Dsor <mohit.dsor@oss.qualcomm.com>
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Add LT9611UXD DSI-to-HDMI bridge support for the Shikra IQS EVK board
and introduce DT overlay infrastructure for HDMI and panel configurations.
The LT9611UXD bridge is connected via I2C bus 4 (address 0x41), powered
by a GPIO-controlled 3.3V regulator (PM8150 GPIO4) and an always-on 1.8V
rail. Reset is on GPIO76 and interrupt on GPIO85. The bridge receives DSI
output from MDSS DSI0 and drives an HDMI-A connector.
Changes:
pinctrl for Shikra IQS EVK
(vreg_disp_3p3, bridge_irq_pin, bridge_rst_pin)
shikra-cqs-evk-hdmi and shikra-iqs-evk-dlc-panel
Tested-on: Shikra IQS EVK with LT9611UXD HDMI bridge
Signed-off-by: Mohit Dsor mohit.dsor@oss.qualcomm.com