Shikra Headphone support - #1078
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Merge Check Failed: CR Not Eligible for Merge CR 4674032 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
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qli-2.1 pull-request freeze |
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Merge Check Failed: CR Not Eligible for Merge CR 4674032 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
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Merge Check Failed: CR Not Eligible for Merge CR 4674032 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
This reverts commit 405a714. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit 87a9438. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
…nd platform register" This reverts commit 280a480. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit 4684a81. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
…m init" This reverts commit 9a7e1ae. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
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Merge Check Failed: CR Not Eligible for Merge CR 4674032 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
…ame helper" This reverts commit d241d62. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
… common" This reverts commit f079100. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit f644701. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit b8ac2a5. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit 7a8fd71. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
…iant interface" This reverts commit a841f18. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit b12cbd8. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit 5d9b38e. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit 5af41c1. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit 6cc3592. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
…pu selection" This reverts commit 279b69b. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
This reverts commit 51b4009. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Add qaif-reg.h to define the MMIO register offsets for the Qualcomm Audio Interface (QAIF) hardware block. The QAIF driver needs a common register map to program the core registers, audio interfaces, AIF/CIF DMA channels, interrupt registers, SHRAM/QXM routing, and SID maps. Add accessor helpers so the driver can select the proper AIF or CIF DMA register set based on the DAI ID. Link: https://lore.kernel.org/all/20260907-b4-qaif-shikra-audio-v5-3-6d8ad9ba5c9f@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Some ASoC CPU DAI drivers need to resolve a sound-dai phandle argument to a DAI name by matching the argument against the component's DAI IDs. lpass-cpu carries a local implementation of this lookup. Add snd_soc_of_xlate_dai_name() to soc-core.c as a generic helper that can be assigned directly to the .of_xlate_dai_name component driver callback. It iterates the component's DAI list using for_each_component_dais() and matches by DAI ID. Link: https://lore.kernel.org/all/20260907-b4-qaif-shikra-audio-v5-5-6d8ad9ba5c9f@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
…atform init Add the QAIF CPU DAI driver to support Qualcomm audio interface paths used for CDC DMA and serial AIF audio links. Implement CIF DAI operations for CDC DMA paths, including channel mask programming and dynamic clock control. Implement AIF DAI operations for MI2S, TDM and PCM paths, including format setup, slot and lane configuration, bit clock management and stream enable handling. Also add the QAIF MMIO regmap setup, parse per-interface configuration from devicetree, manage required clocks and register the CPU DAI component. Link: https://lore.kernel.org/all/20260907-b4-qaif-shikra-audio-v5-4-6d8ad9ba5c9f@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
…te_dai_name() Use the new generic snd_soc_of_xlate_dai_name() helper in lpass-cpu.c and qaif-cpu.c, and remove the local lpass implementation. Link: https://lore.kernel.org/all/20260907-b4-qaif-shikra-audio-v5-6-6d8ad9ba5c9f@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add the PCM platform callbacks needed to use QAIF DAIs for playback and capture. Allocate and map the DMA buffer in open(), reserve a stream DMA index and perform the one-time QAIF hardware initialization. Program the DMA configuration in hw_params(), set the DMA clock rate and program the DMA base, buffer and period registers in prepare(), and report the current DMA position from pointer(). Release all resources in close(). The DMA clocks themselves are prepared and enabled by the CPU DAI driver's startup and shutdown callbacks. Support mmap() for CIF and AIF paths, and add copy() to transfer PCM data between userspace and the DMA buffer. Link: https://lore.kernel.org/all/20260907-b4-qaif-shikra-audio-v5-7-6d8ad9ba5c9f@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
…orm register Finish the QAIF PCM platform support so streams can be registered, started, stopped and serviced by DMA interrupts. Register the ASoC component, request the QAIF interrupt and add trigger handling to enable or disable DMA and its interrupt sources. Dispatch the top-level IRQ status to the AIF and CIF DMA handlers, report period elapsed events to ALSA, warn on xrun conditions and stop the stream on bus errors. Link: https://lore.kernel.org/all/20260907-b4-qaif-shikra-audio-v5-8-6d8ad9ba5c9f@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add the Shikra variant data for the Qualcomm Audio Interface driver so the common QAIF code can bind to the Shikra QAIF device and expose the SoC-specific DAIs. Provide the Shikra DMA-to-DAI mappings, DMA and SHRAM layout, clock names, DAI driver data and power-management hooks required by the QAIF driver. Add the Kconfig symbol and Makefile entries needed to build the new variant. Link: https://lore.kernel.org/all/20260907-b4-qaif-shikra-audio-v5-9-6d8ad9ba5c9f@oss.qualcomm.com/ Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Add an ASoC codec driver for the Qualcomm WSA885X stereo smart speaker amplifier. The driver programs the register map, handles reset and interrupt support, exposes DAI operations for PCM/TDM playback, and provides mixer controls for usage mode, speaker volume and RX slot mask. Keep stream-time power-state sequencing in the DAI callbacks and use regmap for the control path. Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260715115220.3093799-3-prasad.kumpatla@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
…r amplifier Add bindings for the Qualcomm WSA8855 stereo smart speaker amplifier. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260715115220.3093799-2-prasad.kumpatla@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
…patible Add qcom,shikra-soundwire as a standalone compatible for the Shikra SoC SoundWire controller. On Shikra SoC, the SoundWire controller is assigned to an Execution Environment (EE), which determines which banked register window must be used for interrupt, FIFO, and status register access on SoundWire v2.0 and later hardware. Add a dedicated qcom,shikra-soundwire compatible so the driver can select the correct register layout for Shikra at probe time. Link: https://lore.kernel.org/all/20260910-shikra_soundwire_support-v2-1-f98c9a6ea1e1@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
On SoundWire v2.0 and later hardware, FIFO, and status registers are banked per Execution Environment (EE). The existing driver assumes the SoundWire controller is assigned to EE1, which is true for all currently supported Qualcomm SoCs. Shikra is an exception and assigns the controller to EE0. As a result, the relevant register windows are located at different offsets and cannot be accessed using the default EE1 register layout. Add an ee field to the SoC match data and introduce a dedicated qcom,shikra-soundwire compatible with ee = 0. The driver uses this information at probe time to select the correct register layout, while all existing platforms continue to use the default EE1 configuration. Link: https://lore.kernel.org/all/20260910-shikra_soundwire_support-v2-2-f98c9a6ea1e1@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
…ring LPASS_CODEC_VERSION_2_9 is detected by lpass-va-macro.c and consumed by lpass-wsa-macro.c, but lpass_macro_get_codec_version_string() never learned about it, so the probe log reports "LPASS Codec Version NA" on those parts. Add the missing case. Link: https://lore.kernel.org/all/20260910-add_shikra_support-v2-2-fdd2129c696c@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Shikra integrates LPASS codec version 4.1. Add the new version to the codec version enum and to the version string helper. The enum stays ordered by version so that the existing '>=' comparisons on enum lpass_codec_version keep working. Link: https://lore.kernel.org/all/20260910-add_shikra_support-v2-3-fdd2129c696c@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Add shikra RX macro compatible data and hook it into the existing LPASS codec v4.1 flow. The RX macro register layout of LPASS codec v4.1 matches the v2.5+ layout, so reuse the existing v2.5 register access helpers, controls and widgets for it. v4.1 additionally requires the FS counter to be bypassed before it is enabled during MCLK enable. This is a property of the codec version and not of the board, so key it off the version detected by the VA macro rather than off match data. Link: https://lore.kernel.org/all/20260910-add_shikra_support-v2-4-fdd2129c696c@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Add shikra specific VA macro data and register programming needed by the LPASS codec v4.0 implementation. LPASS codec v4.1 extends the VA macro with four adaptive filter (ADPT) blocks at 0x0800..0x09a4 and requires the FS counter to be bypassed before it is enabled. Add the new registers as a separate reg_default array that is concatenated with the common defaults at probe time. The register layout has to be chosen before the regmap exists, i.e. before CDC_VA_TOP_CSR_CORE_ID_* can be read, so it comes from match data; probe then cross checks it against the version reported by the hardware. Link: https://lore.kernel.org/all/20260910-add_shikra_support-v2-5-fdd2129c696c@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
…pport The VA decimators can currently capture audio only from DMIC inputs. Add support for routing audio from SoundWire microphone (SMIC) inputs as well. Update the decimator source selection logic to switch between DMIC and SMIC sources based on the active input path. Add a helper to detect whether a decimator is using a SoundWire microphone input. Use this information to skip DMIC-specific HPF programming sequences when the decimator is configured for an SMIC source. This enables VA decimators to capture audio from either DMIC or SoundWire microphone inputs. Link: https://lore.kernel.org/all/20260910-add_shikra_support-v2-6-fdd2129c696c@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Prepare the sc8280xp machine driver for Shikra EVK variants that use Audio-IF (QAIF) based backends: - Add a `cpu_dai_fmt` field in qcom_snd_soc_common so that boards can override the default SND_SOC_DAIFMT_BP_FP for MI2S and TDM paths. - Handle the QAIF MI2S (AIF_MI2S_RX_0 ... AIF_MI2S_TX_12) and QAIF TDM (AIF_TDM_RX_0 ... AIF_TDM_TX_12) DAI ID ranges in sc8280xp_snd_hw_params() so that format and clock setup applies to QAIF backends. - Add VA_CODEC_DMA_TX_1 to qcom_snd_is_sdw_dai() and sc8280xp_be_hw_params_fixup() so that the VA codec DMA path is recognised as a SoundWire DAI. - Widen the sc8280xp_add_be_ops() link filter to also cover links with codecs (num_codecs > 0), since QAIF FE+BE links are not marked with no_pcm = 1. No functional change for existing platforms. Link: https://lore.kernel.org/all/20260910-shikra-machine-v2-v2-2-9bf6bad589d8@oss.qualcomm.com/ Co-developed-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
Add machine driver support for the Qualcomm Shikra CQM EVK board. The Shikra CQM platform uses an I2S-based audio path with WSA885x amplifiers and PM4125/Rouleur codec components. The CQM variant uses DSP_A framing on its QAIF CPU DAI, configured via the cpu_dai_fmt field introduced in the preceding patch. Link: https://lore.kernel.org/all/20260910-shikra-machine-v2-v2-3-9bf6bad589d8@oss.qualcomm.com/ Co-developed-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
Add machine driver support for the Qualcomm Shikra CQS EVK board. The Shikra CQS platform uses an I2S-based audio path with WSA885x amplifiers and PM4125/Rouleur codec components with modem-DSP based audio processing. Link: https://lore.kernel.org/all/20260910-shikra-machine-v2-v2-4-9bf6bad589d8@oss.qualcomm.com/ Co-developed-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
Add machine driver support for the Qualcomm Shikra IQS EVK board. The Shikra IQS platform uses a third-party MAX98091 codec with modem-DSP support. IQS requires board-level DAPM widgets and pin-switch kcontrols because the MAX98091 codec driver does not expose its own endpoint topology, unlike the Qualcomm WSA885x/Rouleur codecs used on the CQM/CQS variants. Link: https://lore.kernel.org/all/20260910-shikra-machine-v2-v2-5-9bf6bad589d8@oss.qualcomm.com/ Co-developed-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>
…nts for shikra Add an if/then condition for qcom,shikra-lpass-va-macro specifying exactly 2 clocks (mclk and npl) as required by the Shikra VA macro hardware. For the RX macro, add qcom,shikra-lpass-rx-macro to the sc7280 clock section as Shikra uses the same 3-clock configuration (mclk, npl, fsgen) in ADSP-bypass mode. Link: https://lore.kernel.org/all/20260910231642.1794948-3-mohammad.rafi.shaik@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Add the QAIF CPU endpoint in shikra.dtsi so board files can connect LPASS front-end links to backend codecs. Describe the MMIO region, interrupt, IOMMU mapping and required clocks for the QAIF block. Keep the node disabled at SoC level; board dts files enable and consume it in subsequent patches. Link: https://lore.kernel.org/all/20260910231642.1794948-3-mohammad.rafi.shaik@oss.qualcomm.com/ Co-developed-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com> Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Add GPR (Generic Packet Router) node along with APM (Audio Process Manager) and PRM (Proxy Resource Manager) audio services. Add a dedicated MDSP carveout memory region for audio usecases on Shikra and mark both existing audio heap and MDSP carveout regions as shared DMA pools. Update the Q6 APM DAI node to reference multiple memory regions, where index 0 is used for control path buffers and index 1 is used for MDSP data path buffers. This separation ensures proper memory allocation and access for APM communication between APSS and MDSP. Also add shared-dma-pool compatibility to the existing audio heap region to align with upstream DMA pool usage. Link: https://lore.kernel.org/all/20260910231642.1794948-5-mohammad.rafi.shaik@oss.qualcomm.com/ Co-developed-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Add SoC-level SoundWire masters and LPASS RX/VA macro nodes, along with DMIC and SWR pinctrl states required by the audio data path. Keep these nodes disabled in shikra.dtsi so board dts files can selectively enable and configure them. Link: https://lore.kernel.org/all/20260910231642.1794948-6-mohammad.rafi.shaik@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Add SoC-level SoundWire masters and LPASS RX/VA macro nodes, along with DMIC and SWR pinctrl states required by the audio data path. Keep these nodes disabled in shikra.dtsi so board dts files can selectively enable and configure them. Link: https://lore.kernel.org/all/20260910231642.1794948-7-mohammad.rafi.shaik@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Enable the sound card on the shikra-cqs-evk platform, including the PM4125 (Rouleur) headset codec, WSA885x speaker amp. Also enable the required LPASS macro and SoundWire nodes, along with the necessary pinctrl configurations for DMIC and I2S interfaces. Also enable the required LPASS macro along with the necessary pinctrl configurations for DMIC and I2S interfaces. Link: https://lore.kernel.org/all/20260910231642.1794948-8-mohammad.rafi.shaik@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Enable the IQS EVK audio card using MAX98091 on I2S0 for primary playback/capture and VA DMIC capture through q6apm backend links. Add board clock and pinctrl states required for codec IRQ, external mclk and digital mic routing. Link: https://lore.kernel.org/all/20260910231642.1794948-9-mohammad.rafi.shaik@oss.qualcomm.com/ Co-developed-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Enable the WSA885X codec as modules in arm64 defconfig. Link: https://lore.kernel.org/all/20260910231642.1794948-10-mohammad.rafi.shaik@oss.qualcomm.com/ Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
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Merge Check Failed: CR Not Eligible for Merge CR 4674032 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
This change backports the latest upstream Qualcomm Shikra audio support and removes the previously integrated older versions of the audio components.
The following upstream audio updates have been incorporated:
LPASS VA Macro and RX Macro: upgraded from V1 to V2
SoundWire support: upgraded from V1 to V2
QAIF support: upgraded from V1 to V5
Device Tree updates: upgraded from V1 to V2
Machine Driver updates: upgraded from V1 to V2
These updates are required to align the downstream implementation with the latest upstream changes and enable headphone audio functionality on the Shikra platform.
RX Macro and VA Macro : https://lore.kernel.org/all/20260910-add_shikra_support-v2-0-fdd2129c696c@oss.qualcomm.com/
SoundWire : https://lore.kernel.org/all/20260910-shikra_soundwire_support-v2-0-f98c9a6ea1e1@oss.qualcomm.com/
Machine Driver : https://lore.kernel.org/all/20260910-shikra-machine-v2-v2-0-9bf6bad589d8@oss.qualcomm.com/
Device Tree : https://lore.kernel.org/all/20260910231642.1794948-1-mohammad.rafi.shaik@oss.qualcomm.com/
QAIF : https://lore.kernel.org/all/20260907-b4-qaif-shikra-audio-v5-0-6d8ad9ba5c9f@oss.qualcomm.com/
CRs-Fixed: 4674032