WASM PR 2: move the WASM microbenches out of src and into the bench target - #2564
Open
czoli1976 wants to merge 1 commit into
Open
WASM PR 2: move the WASM microbenches out of src and into the bench target#2564czoli1976 wants to merge 1 commit into
czoli1976 wants to merge 1 commit into
Conversation
… target Three timing modules lived in src behind #[cfg(test)] + #[ignore], which no other backend does. benches/wasm.rs already supersedes two of them — its own header records that looping four kernels back-to-back biased the in-src version — so those are dropped, and the activation bench moves across. The numerical-consistency check between 16x1 and 32x1 is an assertion rather than a timer, so it stays in src alongside the dispatch tests. The four copies of the kernel-lookup helper in the bench collapse to one; the timing loops keep their own warmup and repetition counts, which differ on purpose. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Collaborator
|
|
kali
force-pushed
the
refactor/wasm-benches
branch
from
August 3, 2026 19:25
fc934ff to
34e0454
Compare
|
🔴 Bench vs main — 3 speed regression(s) · Reference: 2026-08-03 morning nightly run (0d old) · full report → run Speed — evaltime · prefill · decode
Improvements
+2 more improvement(s)
|
| Δ | metric | device | main → PR |
|---|---|---|---|
| arm_ml_kws_cnn_m load · pass |
cortex-a9 |
84 ms → 97 ms | |
| hey_snips_v4_model17 load+optimize · 2sec |
cortex-a9 |
4.39 s → 5.06 s | |
| hey_snips_v4_model17 load+optimize · 2sec |
cortex-a7 |
5.07 s → 5.82 s | |
| hey_snips_v4_model17 load · 2sec |
cortex-a9 |
3.81 s → 4.34 s | |
| hey_snips_v4_model17 load · 2sec |
cortex-a7 |
4.34 s → 4.92 s | |
| arm_ml_kws_cnn_m load+optimize · pass |
cortex-a9 |
131 ms → 143 ms | |
| llama_3_2_3B_instruct_q40ef16_541 load+optimize · cuda |
jetson-orin-nx |
4.14 s → 4.38 s |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Stacked on #2563 — its two commits are the first two here.
The wasm backend kept three timing modules inside
src/behind#[cfg(test)]+#[ignore], which no other backend does.benches/wasm.rsalready supersedes two of them, and says so itself: its header records that the in-srcversion looped all four GEMV kernels back-to-back and so biased whichever ran last. Those two go; the activation bench moves across to join it.numerical_consistency_16x1_vs_32x1stays insrc, inwasm/dispatch_tests.rs— it is an assertion rather than a timer, and the only numerical cross-check between two kernels.The four copies of the kernel-lookup helper in
benches/wasm.rscollapse to one. I left the timing loops alone: they use 50 versus 200 warmup calls and only two of them do min-of-N reporting, and those differences are deliberate, so a shared helper would have quietly changed what the numbers mean.Net: 335 lines out of
src, andwasm.rsis down to 78 lines.Nothing here ships — test and bench code only, and the kernel disassembly is unchanged. The bench runs: on an M1 Pro the relocated activation bench reports sigmoid 1.49–1.54x and tanh 1.40–1.62x over the scalar path, matching what the module documented.
🍍