feat: formal RVFI support (M-ext ALTOPS, misalign trap, RVFI CSR chan…#2
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0611roxe wants to merge 1 commit into
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feat: formal RVFI support (M-ext ALTOPS, misalign trap, RVFI CSR chan…#20611roxe wants to merge 1 commit into
0611roxe wants to merge 1 commit into
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…nels, debug-mode forcing) Imports the csr branch tree on top of upstream/main as a single commit. Includes: - M-extension ALTOPS support and RV32IMC misa (Cl1MDULp, Cl1Config, Cl1CSR) - Load/store misalign as synchronous exception (Cl1IDEXStage, Cl1EXCP, Cl1WBStage, Cl1Top) - RVFI CSR channels (mstatus/mie/mip/mepc/mcause/mtvec/mscratch/misa) (RVFI.scala, Cl1Top) - Formal-only debug-mode forcing so traps go to mtvec (Cl1Core) - gitignore: mill temp files Verified all 91 riscv-formal checks PASS on the prior baseline.
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…nels, debug-mode forcing)
Imports the csr branch tree on top of upstream/main as a single commit.
Includes:
Verified all 91 riscv-formal checks PASS on the prior baseline.