Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions components/patina_acpi/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@
//!

#![cfg_attr(all(not(feature = "std"), not(test), not(feature = "mockall")), no_std)]
#![deny(missing_docs)]
#![feature(coverage_attribute)]
#![feature(allocator_api)]

Expand Down
1 change: 1 addition & 0 deletions components/patina_adv_logger/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@
" SPDX-License-Identifier: Apache-2.0\n",
)]
#![cfg_attr(all(not(feature = "std"), not(doc)), no_std)]
#![deny(missing_docs)]
#![feature(coverage_attribute)]

#[cfg(any(feature = "alloc", test, doc))]
Expand Down
1 change: 1 addition & 0 deletions components/patina_mm/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
" Copyright (c) Microsoft Corporation.\n\n",
)]
#![cfg_attr(all(not(feature = "std"), not(test), not(feature = "mockall")), no_std)]
#![deny(missing_docs)]
#![feature(coverage_attribute)]

extern crate alloc;
Expand Down
2 changes: 1 addition & 1 deletion components/patina_mm/tests/patina_mm_integration.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,5 +9,5 @@
//!
//! SPDX-License-Identifier: Apache-2.0

#[path = "patina_mm_integration/mod.rs"]
#[path = "patina_mm_integration/tests_root.rs"]
mod patina_mm_integration;
1 change: 1 addition & 0 deletions components/patina_performance/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@
//!

#![cfg_attr(not(test), no_std)]
#![deny(missing_docs)]
#![allow(unexpected_cfgs)]
#![feature(coverage_attribute)]

Expand Down
1 change: 1 addition & 0 deletions components/patina_samples/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@
//! SPDX-License-Identifier: Apache-2.0
//!
#![cfg_attr(not(feature = "std"), no_std)]
#![deny(missing_docs)]
#![feature(coverage_attribute)]
#![coverage(off)] // Disable all coverage instrumentation for sample code
pub mod component;
Expand Down
1 change: 1 addition & 0 deletions components/patina_smbios/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -310,6 +310,7 @@
//! SPDX-License-Identifier: Apache-2.0

#![cfg_attr(all(not(feature = "std"), not(test), not(feature = "mockall")), no_std)]
#![deny(missing_docs)]
#![feature(coverage_attribute)]

// SMBIOS tables require little-endian byte order. The SmbiosRecord derive macro
Expand Down
1 change: 1 addition & 0 deletions components/patina_test/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
" Copyright (c) Microsoft Corporation.\n\n",
)]
#![no_std]
#![deny(missing_docs)]
#![feature(coverage_attribute)]
extern crate alloc;

Expand Down
8 changes: 4 additions & 4 deletions core/patina_internal_collections/src/rbt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -803,7 +803,7 @@ where
if node_is_left_child && sibling.right().is_black() {
sibling.left().set_black();
sibling.set_red();
if let Some(subtree_root) = Self::rotate_right(sibling.unwrap())
if let Some(subtree_root) = Self::rotate_right(sibling.expect("sibling must exist in case 5"))
&& subtree_root.parent().is_none()
{
root.set(subtree_root.as_mut_ptr());
Expand All @@ -813,7 +813,7 @@ where
} else if !node_is_left_child && sibling.left().is_black() {
sibling.right().set_black();
sibling.set_red();
if let Some(subtree_root) = Self::rotate_left(sibling.unwrap())
if let Some(subtree_root) = Self::rotate_left(sibling.expect("sibling must exist in case 5"))
&& subtree_root.parent().is_none()
{
root.set(subtree_root.as_mut_ptr());
Expand All @@ -830,15 +830,15 @@ where
node.parent().set_black();
if node_is_left_child {
sibling.right().set_black();
if let Some(subtree_root) = Self::rotate_left(node.parent().unwrap())
if let Some(subtree_root) = Self::rotate_left(node.parent().expect("node must have parent in case 6"))
&& subtree_root.parent().is_none()
{
root.set(subtree_root.as_mut_ptr());
subtree_root.set_parent(None);
}
} else {
sibling.left().set_black();
if let Some(subtree_root) = Self::rotate_right(node.parent().unwrap())
if let Some(subtree_root) = Self::rotate_right(node.parent().expect("node must have parent in case 6"))
&& subtree_root.parent().is_none()
{
root.set(subtree_root.as_mut_ptr());
Expand Down
6 changes: 3 additions & 3 deletions core/patina_stacktrace/src/aarch64/runtime_function.rs
Original file line number Diff line number Diff line change
Expand Up @@ -88,8 +88,8 @@ impl<'a> RuntimeFunction<'a> {
[exception_table_rva as usize..(exception_table_rva + exception_table_size) as usize]
.chunks(core::mem::size_of::<u32>() * 2) // 2 u32
.map(|ele| {
let func_start_rva = ele.read32(0).unwrap(); // unwrap() will work validated above
let unwind_info = ele.read32(4).unwrap(); // unwrap() will work validated above
let func_start_rva = ele.read32(0).expect("chunk is 8 bytes, offset 0 is valid");
let unwind_info = ele.read32(4).expect("chunk is 8 bytes, offset 4 is valid");

let flag = unwind_info & 0x3;

Expand All @@ -102,7 +102,7 @@ impl<'a> RuntimeFunction<'a> {
0 => {
let xdata_rva = unwind_info as usize;
let xdata_header = &pe.bytes[xdata_rva..xdata_rva + 4];
let xdata_header = xdata_header.read32(0).unwrap();
let xdata_header = xdata_header.read32(0).expect("xdata header slice is 4 bytes");
(xdata_header & 0x3FFFF) * 4
}
// Packed unwind data used with a single prolog and epilog
Expand Down
6 changes: 3 additions & 3 deletions core/patina_stacktrace/src/x64/runtime_function.rs
Original file line number Diff line number Diff line change
Expand Up @@ -90,9 +90,9 @@ impl<'a> RuntimeFunction<'a> {
.chunks(core::mem::size_of::<u32>() * 3) // 3 u32
.map(|ele| {
(
ele.read32(0).unwrap(), // start_rva - unwrap() will work validated above
ele.read32(4).unwrap(), // end_rva - unwrap() will work validated above
ele.read32(8).unwrap(), // unwindinfo_rva - unwrap() will work validated above
ele.read32(0).expect("chunk is 12 bytes, offset 0 is valid"),
ele.read32(4).expect("chunk is 12 bytes, offset 4 is valid"),
ele.read32(8).expect("chunk is 12 bytes, offset 8 is valid"),
)
})
.find(|ele| ele.0 <= rip_rva && rip_rva < ele.1)
Expand Down
Loading