[PW_SID:1095073] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support#1943
[PW_SID:1095073] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support#1943linux-riscv-bot wants to merge 9 commits into
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Add Shenzhen Rongda Computer Co., Ltd. to the vendor prefixes. Link: http://www.shenrongda.com/ Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Update Documentation for supporting UltraRISC CP100 based CPU. CP100 is used in UltraRISC DP1000 SoC. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add DT binding documentation for the UltraRISC DP1000 SoC. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add bindings for the pin controllers on the UltraRISC DP1000 RISC-V SoC. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add the base device tree for the UltraRISC DP1000 SoC. It describes the 8×CP100 CPU cores and essential SoC peripherals including the interrupt controller, pinctrl, GPIO, UART, SPI, I2C, PCIe, GMAC and the DMA controller. Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-2-98935f6cdfb5@ultrarisc.com/ Link: https://lore.kernel.org/lkml/20260429-ultrarisc-serial-v7-3-e475cce9e274@ultrarisc.com/ Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add pinctrl driver for UltraRISC DP1000 pinctrl controller. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Rongda M0 is an mATX motherboard based on the UltraRISC DP1000 SoC. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Milk-V Titan is an ITX motherboard based on the UltraRISC DP1000 SoC. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Enable `ARCH_ULTRARISC` in the default RISC-V defconfig. Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com/ Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 1: "[1/9] dt-bindings: vendor-prefixes: add Rongda" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 2: "[2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible" |
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Patch 7: "[7/9] riscv: dts: ultrarisc: add Rongda M0 board device tree" |
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Patch 7: "[7/9] riscv: dts: ultrarisc: add Rongda M0 board device tree" |
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Patch 7: "[7/9] riscv: dts: ultrarisc: add Rongda M0 board device tree" |
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Patch 7: "[7/9] riscv: dts: ultrarisc: add Rongda M0 board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 8: "[8/9] riscv: dts: ultrarisc: add Milk-V Titan board device tree" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
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Patch 9: "[9/9] riscv: defconfig: enable ARCH_ULTRARISC" |
PR for series 1095073 applied to workflow__riscv__fixes
Name: riscv: ultrarisc: add DP1000 SoC DT and pinctrl support
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1095073
Version: 1