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Fixed #1725 cbo.zero #1735

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Merged
jordancarlin merged 1 commit into from
Apr 14, 2026
+2 −1
Merged

Fixed #1725 cbo.zero #1735

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3 changes: 2 additions & 1 deletion src/cache/cachefsm.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -119,6 +119,7 @@ module cachefsm #(parameter READ_ONLY_CACHE = 0) (
else if(FlushCache & ~READ_ONLY_CACHE) NextState = STATE_FLUSH; // exclusion-tag: icache FLUSHStatement
else if(AnyMiss & (READ_ONLY_CACHE | ~LineDirty)) NextState = STATE_FETCH; // exclusion-tag: icache FETCHStatement
else if((AnyMiss | CMOWriteback) & ~READ_ONLY_CACHE) NextState = STATE_WRITEBACK; // exclusion-tag: icache WRITEBACKStatement
else if(CMOZeroNoEviction) NextState = STATE_ADDRESS_SETUP; // cbo.zero (no dirty eviction): stall and re-read SRAM next cycle
else NextState = STATE_ACCESS;
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davidharrishmc marked this conversation as resolved.
STATE_FETCH: if(CacheBusAck) NextState = STATE_WRITE_LINE;
else NextState = STATE_FETCH;
Expand All @@ -143,7 +144,7 @@ module cachefsm #(parameter READ_ONLY_CACHE = 0) (

// com back to CPU
assign CacheCommitted = (CurrState != STATE_ACCESS) & ~(READ_ONLY_CACHE & (CurrState == STATE_ADDRESS_SETUP));
assign StallConditions = FlushCache | AnyMiss | CMOWriteback; // exclusion-tag: icache FlushCache
assign StallConditions = FlushCache | AnyMiss | CMOWriteback | CMOZeroNoEviction; // exclusion-tag: icache FlushCache
assign CacheStall = (CurrState == STATE_ACCESS & StallConditions) | // exclusion-tag: icache StallStates
(CurrState == STATE_FETCH) |
(CurrState == STATE_WRITEBACK) |
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