QCLINUX: arm64: dts: qcom: lemans and monaco: Rework RTSS Mailbox DT to use syscon and staging overlays - #1768
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Dmitry Baryshkov (@lumag), Ricardo Salveti (@ricardosalveti), Nicolas Dechesne (@ndechesne), Viswanath Kraleti (@vkraleti), Komal Bajaj (@Komal-Bajaj) would you please review the changes. |
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Thank you Dmitry Baryshkov (@lumag) , I have addressed comments. |
PR #1768 — validate-patchPR: #1768
Final Summary
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PR #1768 — checker-log-analyzerPR: #1768
Detailed report: Full report
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…ee overlay" This reverts commit 1923b1c. The original overlay accessed the APSS TCSR mutex/status registers via direct memory-mapped reg ranges and shipped RTSS as a standalone lemans-rtss-mb.dtso overlay. Upstream review feedback on this design requires: - Accessing the TCSR registers via a syscon phandle instead of a direct reg-mapped node. - Folding the RTSS mailbox node into the shared lemans-staging.dtso overlay instead of a separate, RTSS-only DTBO. The following commits reintroduce this support using that syscon-based, staging-overlay design. Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
…ee overlay" This reverts commit 1179022. Same as the lemans overlay, the original Monaco overlay accessed the APSS TCSR mutex/status registers via direct memory-mapped reg ranges and shipped RTSS as a standalone monaco-rtss-mb.dtso overlay. Upstream review feedback on this design requires: - Accessing the TCSR registers via a syscon phandle instead of a direct reg-mapped node. - Folding the RTSS mailbox node into the shared monaco-staging.dtso overlay instead of a separate, RTSS-only DTBO. The following commits reintroduce this support using that syscon-based, staging-overlay design. Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
Add ipcc1-ipcc4 mailbox controllers and apss_tcsr_req, apss_tcsr_resp, apss_shared_ipc syscon nodes for Lemans platform, required by the RTSS Mailbox device node. Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
Add rtss_mailbox device node for Lemans platform, syscon-based, using ipcc1-ipcc4 and the apss_tcsr_req/apss_tcsr_resp/apss_shared_ipc syscon nodes. Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
… for RTSS Mailbox Add ipcc1-4 mailbox nodes and the apss_tcsr_req/apss_tcsr_resp/ apss_shared_ipc syscon nodes on Monaco. These nodes back the syscon/mbox phandle references used by the Monaco RTSS mailbox node (qcom,rtss-mailbox). Reserve the memory regions used by the SAIL/RTSS subsystem for its TZ mailbox, shared-memory mailbox, and OTA buffer on Monaco. These regions back the memory-region references used by the Monaco RTSS mailbox node. Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
Add the rtss_mailbox overlay node on Monaco, mirroring the Lemans RTSS mailbox node. Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
Add missing rtss mailbox dt schema file. Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
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hi Dmitry Baryshkov (@lumag), Ricardo Salveti (@ricardosalveti), |
| #include <dt-bindings/clock/qcom,sa8775p-gcc.h> | ||
| #include <dt-bindings/mailbox/qcom-ipcc.h> | ||
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| &{/} { |
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Add rtss_mailbox device node for Lemans platform, syscon-based, using
ipcc1-ipcc4 and the apss_tcsr_req/apss_tcsr_resp/apss_shared_ipc
syscon nodes.
You are not.
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| apss_shared_ipc: syscon@17c0000c { | ||
| compatible = "qcom,sa8775p-tcsr", "syscon"; |
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What exactly is behind this address? TCSR is at the other address, so it can't be TCSR.
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| apss_shared_ipc: syscon@17c0000c { | ||
| compatible = "qcom,qcs8300-tcsr", "syscon"; |
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Same question. Is it really TCSR?
Target milestone: QLI-2.1
Summary
Reworks the RTSS Mailbox device-tree support on Lemans and Monaco to address maintainers review feedback on the original design merged via #1327: syscon-based TCSR access, staging-overlay consolidation, and removal of the standalone RTSS-only DTBOs.
Impact
time for configs that include the staging overlay, per the existing FIT config).
Unchanged
Tracking issue
qualcomm-linux/meta-qcom#3085
This PR dependency
Related PRs
RTSS interface enablement is handled using a staging DTBO overlay to carry the rtss mailbox node, both bootup and DTBO patching with it applied have been verified on target.
Testing
Change Request
CRs-Fixed: 4668068
RTSS Feature Enablement Exception
https://jira-dc.qualcomm.com/jira/browse/QLIJIRA-123